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#22
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Oh cool. Okay then, that's a start. Of course you'll need the other logic too, but it's a good start.
Going for the Slinky approach first? What I had envisioned is just a bread board with CPLD and SDRAM and a RAMWorks III/Slinky/RAMFactor card with fly wires attached to the DRAM DIP sockets. That way you know the RAMWorks III/Slinky/RAMFactor card is already working and then you just need to work on the memory emulation. Once that's working then backing in to one of those designs should be pretty easy. |
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Thats why the slinky makes a good first choice since the ram access is really hidden from the computer ....it only knows about the byte/block interface and not the memory architecture underneath ... it's all hidden That kind of goes back to my 3 part layout i mentioned in this or another thread 1) SDRAM Controller IP 2) STD SRAM interaface code 3) Host specific code be it slinky, DRAM emulation ...etc ... |
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I do see your point with the Slinky. Good call. |
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